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Search: "[ keyword: Multilevel inverter ]" (78)
Extendable space‑type switched‑capacitor multilevel inverter with fault‑tolerant capability
Yaoqiang Wang Hengtai Zhang Jinmu Lai Kewen Wang Jun Liang
Vol. 22, No. 6, pp. 923-934, Jun. 2022
10.1007/s43236-022-00436-8
Vol. 22, No. 6, pp. 923-934, Jun. 2022
10.1007/s43236-022-00436-8
Hardware implementation for hybrid active NPC converters using FPGA‑based dual pulse width modulation
Laith M. Halabi Ibrahim Mohd Alsofyani Kyo-Beum Lee
Vol. 21, No. 11, pp. 1669-1679, Nov. 2021
10.1007/s43236-021-00305-w
Vol. 21, No. 11, pp. 1669-1679, Nov. 2021
10.1007/s43236-021-00305-w
Hybrid phase‑shifted modulation method for hybrid cascaded H‑bridge inverters
Wenhua Hu Jiamin Guo Jianfeng Liu Yisheng Yuan
Vol. 21, No. 10, pp. 1556-1566, Oct. 2021
10.1007/s43236-021-00287-9
Vol. 21, No. 10, pp. 1556-1566, Oct. 2021
10.1007/s43236-021-00287-9
SVPWM algorithm for five‑level active‑neutral‑point‑clamped H‑bridge inverters
Linfei Jiang Fei Xiao Liangdeng Hu Yingjie Jia
Vol. 21, No. 8, pp. 1123-1134, Aug. 2021
10.1007/s43236-021-00259-z
Vol. 21, No. 8, pp. 1123-1134, Aug. 2021
10.1007/s43236-021-00259-z
Step‑up switched‑capacitor multilevel inverter employing multiple inputs with reduced switches
Yaoqiang Wang Zhe Wang Wenjun Liu Yun Zhang Kewen Wang
Jun Liang
Vol. 21, No. 7, pp. 986-997, Jul. 2021
10.1007/s43236-021-00245-5
Jun Liang
Vol. 21, No. 7, pp. 986-997, Jul. 2021
10.1007/s43236-021-00245-5
Performance improvement of cascaded H‑bridge multilevel inverters with modified modulation scheme
Analysis and design of flux cancellation power-decoupling method for electrolytic-capacitorless three-phase cascaded multilevel inverters
Mohammad Sameer Irfan Mohamed Atef Tawfik Ashraf Ahmed Joung-Hu Park
Vol. 21, No. 2, pp. 321-341, Feb. 2021
10.1007/s43236-020-00196-3
Vol. 21, No. 2, pp. 321-341, Feb. 2021
10.1007/s43236-020-00196-3
An efficient hybrid digital architecture for space vector PWM method for multilevel VSI
K. G. Anjana M. Aswini Kumar Jayanta Biswas Mukti Barai
Vol. 20, No. 5, pp. 1328-1341, Sep. 2020
10.1007/s43236-020-00120-9
Vol. 20, No. 5, pp. 1328-1341, Sep. 2020
10.1007/s43236-020-00120-9
Evolutionary algorithm based selective harmonic elimination for three‑phase cascaded H‑bridge multilevel inverters with optimized input sources
S. Sankara Kumar M. Willjuice Iruthayarajan T. Sivakumar
Vol. 20, No. 5, pp. 1172-1183, Sep. 2020
10.1007/s43236-020-00112-9
Vol. 20, No. 5, pp. 1172-1183, Sep. 2020
10.1007/s43236-020-00112-9
New switched‑capacitor‑based boost inverter topology with reduced switch count
Marif Daula Siddique Saad Mekhilef Noraisyah Mohamed Shah Jagabar Sathik Mohamed Ali
Vol. 20, No. 4, pp. 926-937, Jul. 2020
10.1007/s43236-020-00102-x
Vol. 20, No. 4, pp. 926-937, Jul. 2020
10.1007/s43236-020-00102-x